| inviato il 10 Ottobre 2019 ore 17:53
Ei ei piano con le parole eh Non si nomima Canon così a sproposito. |
| inviato il 10 Ottobre 2019 ore 18:00
Parlano di strato verde in cima, ma non credo che si possa aggirare così un brevetto. È la commistione di organico e a strati a renderlo diverso. |
| inviato il 10 Ottobre 2019 ore 18:07
" si ma che te ne fai" "non avrà la pasta" "e i colori?" "la mia del 2008 alla fine è uguale" "è solo ff" insomma... scaffale va.. |
| inviato il 10 Ottobre 2019 ore 18:14
Facciamo un paio d'anni... |
user14103 | inviato il 10 Ottobre 2019 ore 18:24
A 1/2inch 48M All PDAF CMOS Image Sensor Using 0.8µm Quad Bayer Coding 2×2OCL with 1.0lux Minimum AF Illuminance Level Tatsuya Okawa, Susumu Ooki, Hiroaki Yamajo, Masakazu Kawada, Masayuki Tachi, Kazuhiro Goi, Takatsugu Yamasaki, Hiroki Iwashita, Sony Semiconductor manufacturing Corporation, Masahiko Nakamizo, Takayuki Ogasahara, Yoshiaki Kitano, Keiji Tatani, Sony Semiconductor Solutions Corporation, Sony Semiconductor Manufacturing Corporation We created the world's first all PDAF CMOS image sensor using 2x2 on-chip lens architecture. That had 1/2 inch 48M pixels with 0.8µm Quad Bayer coding for high resolution and HDR function, and all PDAF pixels achieved a minimum AF illuminance level of 1 lux. Three-layer Stacked Color Image Sensor With 2.0-?m Pixel Size Using Organic Photoconductive Film Togashi Hideaki, Sony Semiconductor Solutions Corporation A three-layer stacked color image sensor was formed using an organic film. The sensor decreases the false color problem as it dose not require demosaicing. Furthermore, with the 2.0-?m pixel image sensor, improved spectral characteristics owing to green adsorption by the organic film above the red/blue photodiode, were successfully demonstrated. High-definition Visible-SWIR InGaAs Image Sensor using Cu-Cu Bonding of IIIV to Silicon Wafer Shuji Manda, Sony Semiconductor Solutions Corporation We developed a back-illuminated InGaAs image sensor with 1280 x 1040 pixels at 5-um pitch by using Cu-Cu hybridization connecting different materials, a III-V InGaAs/InP of photodiode array, and a silicon readout integrated circuit (ROIC). A prototype device showed high sensitivity at visible to SWIR wavelengths and low dark current. Nanophotonics contributions to state-of-the-art CMOS Image Sensors (Invited) Sozo Yokogawa, Sony Semiconductor Solutions Corporation Recent progress of Back-illuminated CMOS image sensors (BI-CISs), focusing on their pixel improvements with the design of optical properties using subwavelength sizescale strcutures and photonics technologies, are reviewed. These technologies contribute not only improving BI-CIS basic performance but also adding new functions for versatile sensing applications. 14nm FinFET Process Technology Platform for Over 100M Pixel Density and Ultra Low Power 3D Stack CMOS Image Sensor Donghee Yu, Choongjae Lee, Myoungkyu Park, Samsung, Samsung Electronics CMOS Image Sensor(CIS) products need higher voltage device and better analog characteristics than conventional SOC & Logic products. This work presents newly developed 14nm FinFET process with 2.xV high voltage FinFET device characteristics showing excellent analog and low power digital characteristics comparing to 28nm planar process. A 0.8 µm Smart Dual Conversion Gain Pixel for 64 Megapixels CMOS Image Sensor with 12k e- Full-Well Capacitance and Low Dark Noise Donghyuk Park, Seung-Wook Lee, Jinhwa Han, Dongyoung Jang, Heesang Kwon, Seungwon Cha, Mihye Kim, Haewon Lee, Sungho Suh, Woong Joo, Yunki Lee, Seungjoo Nah, Heegeun Jeong, Bumsuk Kim, Sangil Jung, Jesuk Lee, Yitae Kim, Chang-Rok Moon, Yongin Park, Samsung Electronics A 0.8 ?m-pitch 64 megapixels CIS has been demonstrated for the first time. 6k e- full-well capacity (FWC) was achieved, and the advanced color filter isolation was introduced. Dual conversion gain enhanced the Tetracell FWC to 12k e-. Highly refined deep trench isolation and photodiode also improved dark noise characteristics. Low-Latency Interactive Sensing for Machine Vision (Invited) Paul K. J. Park, Jun-Seok Kim, Chang-Woo Shin, Hyunku Lee, Weiheng Liu, Qiang Wang, Yohan J. Roh, Jeonghan Kim, Yotam Ater, Hyunsurk Ryu, Samsung Electronics We introduce the low-latency interactive sensing and processing solution for machine vision applications. The event-based vision sensor can compress the information of moving objects in cost-effective way, which in turn, enables the energy-efficient and real-time processing in various applications such as person detection, motion recognition, and Simultaneous Localization and Mapping. A 2.2µm Stacked Back Side Illuminated Voltage Domain Global Shutter CMOS Image Sensor Geunsook Park, Alan Hsiung, Keiji Mabuchi, Jingming Yao, Zhiqiang Lin, Vincent Venezia, Tongtong Yu, Yu-Shen Yang, Tiejun Dai, Lindsay Grant, OmniVision This paper introduces a 2.2µm stacked BSI voltage domain global shutter CMOS image sensor displaying over 100dB shutter efficiency, as well as high NIR-QE of 38% at 940nm, 60% MTF Ny/2 at 940nm with stacked pixel level connections, high density MIM capacitors, and Full back-side Deep Trench Isolations. A Highly Reliable Back Side Illuminated Pixel against Plasma Induced Damage Yolene Sacchettini, Jean-Pierre Carrère, Célestin Doyen, Stéphane Ricq, Romain Duru, Vincent Goiffon, Pierre Magnan, Kristell Courouble, STMicroelectronics / ISAE-Supaero, STMicroelectronics, Univ. of Toulouse Plasma process interaction with BSI image sensor is for the first time presented. The backside dielectrics properties modulate the damage, this was characterized by measuring the dielectrics charge and the interface state density. Metal oxides present a better hardiness to plasma damage due to their negative charge even after plasma. Flexible, Active-Matrix Flat-Panel Image Sensor for Low Dose X-ray Detection Enabled by Integration of Perovskite Photodiode and Oxide Thin Film Transistor Taoyu Zou, Changdong Chen, Ben Xiang, Ya Wang, Chuan Liu, Shengdong Zhang, Hang Zhou, Peking University Shenzhen Graduate School, Sun Yat-sen University An image sensor based on low-cost two-step deposited perovskite photodiode arrays and oxide (IGZO) TFTs is demonstrated for direct and indirect X-ray imaging applications. The system can be fabricated on flexible substrates, and the perovskite photodiode exhibits a significant direct X-ray response, reaching a sensitivity of ~887 ?CGy-cm^–2 Intelligent Vision Systems – Bringing Human-Machine Interface to AR/VR (Invited) Chiao Liu, Andrew Berkovich, Song Chen, Hans Reyserhove, Syed Shakib Sarwar, Tsung-Hsun Tsai, Facebook Reality Labs An all-day wearable AR/VR device in a glasses form factor needs new input modalities. The candidates include voice, eye gazing, hand/body/head gestures, and BCI. This paper describes computer vision based modalities and the sensor and system specifications, and propose solutions to the extremely stringent power, form factor and performance challenges. High-speed Image Processing Devices and Its Applications (Invited) Masatoshi Ishikawa, The University of Tokyo We have developed a high-speed and low-latency image processing devices and systems. In this talk, their architectures and applications such as robotics, factory automation, fuman interface, bio/medical applications, 3D achieving, and vehicles will be explained by using videos. IEDM tipsheet explains the impact of Sony InGaAs integration paper: "Demand for imaging in the short-wavelength infrared range (SWIR, or 1,000-2,000nm wavelengths) has been increasing for industrial, science, medical, agricultural and security purposes. InGaAs has been used to build SWIR sensors because it can absorb light in this range that silicon cannot. With conventional back-illuminated InGaAs sensors, each pixel of a photodiode array is connected to a readout circuit on a silicon wafer by means of a microbump. But it's difficult to scale these bumps, and so creating finepitch pixel arrays for greater image definition is difficult. A Sony team will describe an architecture in which each pixel in an InGaAs/InP photodiode array is connected to the readout circuit not with microbumps, but by means of copper-to-copper bonding, resulting in a much tighter pitch. They used the technique to build a prototype 1280 x 1024-pixel array with a 5µm pitch. Also, thinning of the InP layer and process optimization yielded a sensor that demonstrated high sensitivity and low dark current, respectively. The researchers say this work paves the way for high-definition SWIR imaging." |
| inviato il 10 Ottobre 2019 ore 18:44
Tradotto? |
| inviato il 10 Ottobre 2019 ore 18:52
Con Tiejun Dai e Lindsay Grant nel team di sviluppo possiamo andare sul sicuro. |
user14103 | inviato il 10 Ottobre 2019 ore 20:54
Tradotto? Canon scaffale |
user92328 | inviato il 10 Ottobre 2019 ore 21:29
“ Facciamo un paio d'anni...MrGreen „ no che poi mi diventano le mani come l'uva "passera" ..... |
user3548 | inviato il 10 Ottobre 2019 ore 21:39
non Se ne farà nulla, Sony sta per fare un flop secolare e quando gli speculatori metteranno le mani sopra alle sue azioni vedrete che ridere |
| inviato il 10 Ottobre 2019 ore 21:45
Bo |
| inviato il 10 Ottobre 2019 ore 21:47
Beh, per ora ridiamo di gusto, non essendo il Mago Otelma non riesco a prevedere il futuro. |
| inviato il 10 Ottobre 2019 ore 22:20
Quando Sony mi farà un sensore a pelo di f... ne comprerò una. |
| inviato il 10 Ottobre 2019 ore 22:46
Bo, mah |
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